1. Technical Field
The present invention relates to a semiconductor device, a manufacturing method of the semiconductor device, and the like.
2. Related Art
A semiconductor device that includes a capacitor (MOS capacitor) that is formed by using a MOS structure as a circuit element is used, for example. A known MOS capacitor is constituted by a gate electrode formed above a semiconductor substrate via a gate insulating film and a substrate region (hereinafter, also referred to as “electrode region”) that opposes the gate electrode with the gate insulating film being interposed therebetween.
However, in the case where the MOS capacitor is configured by using a substrate region having a low impurity concentration similar to a substrate region in which a MOS field effect transistor is formed, a depletion layer is generated in the electrode region due to inversion of the voltage applied to the gate electrode, and an inversion capacitance is formed. Accordingly, the total capacitance of the MOS capacitor is expressed as a series connection of the capacitance determined by the shape of the gate insulating film and the gate electrode and the inversion capacitance, and has voltage dependence.
In circuit design, in general, a capacitance having voltage dependence is difficult to use, and a capacitance having no voltage dependence is desired. Therefore, the voltage dependence of the capacitance of the MOS capacitor is avoided or reduced by increasing the impurity concentration in the electrode region such that the depletion layer is not generated in the electrode region when voltage is applied to the gate electrode.
However, if the impurity concentration in the electrode region is too high, degradation in quality occurs such as a reduction in capacitance of the MOS capacitor and a reduction in breakdown voltage of the gate insulating film caused by abnormal growth of an oxide film when the gate insulating film is formed by oxidizing a surface of the semiconductor substrate. Accordingly, an optimum value exists in the impurity concentration in the electrode region of the MOS capacitor.
Also, there are cases in which a zener diode is formed as a circuit element in a semiconductor device. The zener diode is constituted by a PN junction of a high concentration P-type impurity diffusion region and an N-type impurity diffusion region. In general, the PN junction is formed by joining a P-type impurity diffusion region that constitutes a source or a drain of a MOS field effect transistor and an N-type impurity diffusion region. Note that adjustment of the concentration in impurity diffusion regions that form the PN junction is needed when the specifications of the breakdown voltage are different.
A MOS capacitor in which voltage dependence is reduced is disclosed in JP-A-2000-340674 (paragraphs 0005-0007, FIG. 8) as a related technology. The MOS capacitor is formed in a CMOS device in which both a P-channel MOS transistor and an N-channel MOS transistor are included, and a high concentration region having the same conductivity as a semiconductor region that is located under an insulating film constituting the MOS capacitor is formed in the semiconductor region so as to be adjacent to the insulating film.
Incidentally, it is required that, in order to realize various circuits, a zener diode having a desired breakdown voltage and a capacitor in which voltage dependence of capacitance is reduced are mounted together in the semiconductor device. Meanwhile, when an attempt is made to mount a plurality of different types of circuit elements together in the semiconductor device, processes for forming dedicated impurity diffusion regions for respective circuit elements increase, and the manufacturing cost of the semiconductor device increases due to the increased number of masks and processes.